SEMICONDUCTOR STRUCTURE FOR NANORIBBON ARCHITECTURES

Embodiments disclosed herein include a semiconductor device and a method for forming the device. In one embodiment, the semiconductor device includes a pin having a first end and a second end. In one embodiment, the first dielectric covers the first end of a fin and the second dielectric covers the...

Full description

Saved in:
Bibliographic Details
Main Authors WALLACE CHARLES H, GULER LEONARD P, GHANI TAHIR
Format Patent
LanguageEnglish
Korean
Published 28.06.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:Embodiments disclosed herein include a semiconductor device and a method for forming the device. In one embodiment, the semiconductor device includes a pin having a first end and a second end. In one embodiment, the first dielectric covers the first end of a fin and the second dielectric covers the second end of the fin. In one embodiment, a gate structure is over the first end of the fin and the gate structure is on the top surface of the fin and the top surface of the first dielectric. 본 명세서에 개시된 실시예는 반도체 디바이스 및 이러한 디바이스를 형성하는 방법을 포함한다. 일 실시예에서, 반도체 디바이스는 제1 단부 및 제2 단부를 갖는 핀을 포함한다. 일 실시예에서, 제1 유전체는 핀의 제1 단부를 덮고, 제2 유전체는 핀의 제2 단부를 덮는다. 일 실시예에서, 게이트 구조물은 핀의 제1 단부 위에 있으며, 게이트 구조물은 핀의 상단 표면 및 제1 유전체의 상단 표면 상에 있다.
Bibliography:Application Number: KR20220154974