3D HIGH DENSITY 3D INTERCONNECT CONFIGURATION

3D 상호연결(interconnect) 구조체가 다이(die)로의 전력 및 신호 전달을 위한 패키지 재배선 층(redistribution layer) 및/또는 칩렛(chiplet) 내에 통합되는 전자 패키지 구조체들 및 시스템들이 설명된다. 이러한 구조체들은 전력 전달을 실현 가능하게 유지하면서 입력 출력(IO) 밀도 및 신호들에 대한 라우팅 품질을 상당히 개선할 수 있다. Electronic package structures and systems are described in which a 3D interconnect struct...

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Main Authors DABRAL SANJAY, ZHAI JUN, HU KUNZHONG, CAO ZHITAO
Format Patent
LanguageEnglish
Korean
Published 24.05.2023
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Abstract 3D 상호연결(interconnect) 구조체가 다이(die)로의 전력 및 신호 전달을 위한 패키지 재배선 층(redistribution layer) 및/또는 칩렛(chiplet) 내에 통합되는 전자 패키지 구조체들 및 시스템들이 설명된다. 이러한 구조체들은 전력 전달을 실현 가능하게 유지하면서 입력 출력(IO) 밀도 및 신호들에 대한 라우팅 품질을 상당히 개선할 수 있다. Electronic package structures and systems are described in which a 3D interconnect structure is integrated into a package redistribution layer and/or chiplet for power and signal delivery to a die. Such structures may significantly improve input output (TO) density and routing quality for signals, while keeping power delivery feasible.
AbstractList 3D 상호연결(interconnect) 구조체가 다이(die)로의 전력 및 신호 전달을 위한 패키지 재배선 층(redistribution layer) 및/또는 칩렛(chiplet) 내에 통합되는 전자 패키지 구조체들 및 시스템들이 설명된다. 이러한 구조체들은 전력 전달을 실현 가능하게 유지하면서 입력 출력(IO) 밀도 및 신호들에 대한 라우팅 품질을 상당히 개선할 수 있다. Electronic package structures and systems are described in which a 3D interconnect structure is integrated into a package redistribution layer and/or chiplet for power and signal delivery to a die. Such structures may significantly improve input output (TO) density and routing quality for signals, while keeping power delivery feasible.
Author ZHAI JUN
HU KUNZHONG
DABRAL SANJAY
CAO ZHITAO
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Snippet 3D 상호연결(interconnect) 구조체가 다이(die)로의 전력 및 신호 전달을 위한 패키지 재배선 층(redistribution layer) 및/또는 칩렛(chiplet) 내에 통합되는 전자 패키지 구조체들 및 시스템들이 설명된다. 이러한 구조체들은 전력 전달을 실현 가능하게...
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SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title 3D HIGH DENSITY 3D INTERCONNECT CONFIGURATION
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