SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Provided is a manufacturing method of a semiconductor package. The manufacturing method of a semiconductor package may place a preliminary semiconductor package including a substrate to which pads are attached, an interposer on the substrate, and a semiconductor chip between the substrate and the in...

Full description

Saved in:
Bibliographic Details
Main Authors KIM YONG HYUN, KIM SUN CHUL, LEE MIN JAE, LEE JU HYUNG, KWON DONG UK
Format Patent
LanguageEnglish
Korean
Published 21.03.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:Provided is a manufacturing method of a semiconductor package. The manufacturing method of a semiconductor package may place a preliminary semiconductor package including a substrate to which pads are attached, an interposer on the substrate, and a semiconductor chip between the substrate and the interposer on a stage, place a bonding tool on the interposer, wherein a first surface facing the interposer includes a first area and a second area outside the first area, and bond the interposer and the substrate by placing the second area of the bonding tool to correspond to the pads. 반도체 패키지 제조 방법이 제공된다. 상기 반도체 패키지 제조 방법은, 패드부가 부착된 기판, 기판 상의 인터포저 및 기판과 인터포저 사이의 반도체 칩을 포함하는 예비 반도체 패키지를 스테이지 상에 배치하고, 인터포저와 마주하는 제1 면이 제1 영역 및 제1 영역의 외곽의 제2 영역을 포함하는 본딩 툴을 인터포저 상에 배치하고, 본딩 툴의 제2 영역이 패드부와 대응되도록 배치하여 인터포저와 기판을 접합시킨다.
Bibliography:Application Number: KR20210122279