INTEGRATED CIRCUIT INCLUDING STANDARD CELL AND METHOD FOR DESIGNING THE SAME

An integrated circuit according to an exemplary embodiment of the present disclosure includes: a plurality of standard cells including first and second standard cells disposed adjacent to each other in a first direction; and first to third metal layers sequentially stacked in a vertical direction. W...

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Bibliographic Details
Main Authors JEONG MIN JAE, YU JI SU, PYO YU JIN, YOU HYEON GYU, DO JUNG HO
Format Patent
LanguageEnglish
Korean
Published 21.02.2023
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:An integrated circuit according to an exemplary embodiment of the present disclosure includes: a plurality of standard cells including first and second standard cells disposed adjacent to each other in a first direction; and first to third metal layers sequentially stacked in a vertical direction. Within an area where at least one standard cell of the first standard cell and the second standard cell is disposed, power is provided to the plurality of standard cells, and at least one power segment formed as a pattern of the third metal layer extended in a second direction is disposed. 본 개시의 예시적 실시예에 따른 집적 회로는, 제1 방향으로 서로 인접하게 배치되는 제1 및 제2 표준 셀을 포함하는 복수의 표준 셀들, 및 수직 방향으로 차례로 적층되는 제1 내지 제3 메탈 레이어를 포함하고, 제1 표준 셀 및 제2 표준 셀 중 적어도 하나의 표준 셀이 배치되는 영역 내부에, 복수의 표준 셀들에 전력을 제공하고, 제2 방향으로 연장되는 제3 메탈 레이어의 패턴으로서 형성되는 적어도 하나의 파워 세그먼트(power segment)가 배치되는 것을 특징으로 할 수 있다.
Bibliography:Application Number: KR20210107533