SEMICONDUCTOR PROCESSING SYSTEMS WITH IN-SITU ELECTRICAL BIAS
A system for processing a semiconductor wafer comprises: a processing chamber; a heat source; a substrate holder configured to expose a semiconductor wafer to the heat source; a first electrode configured to be detachably coupled to a first major surface of the semiconductor wafer; and a second elec...
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Main Authors | , , , , , , , , , , , |
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Format | Patent |
Language | English Korean |
Published |
01.09.2022
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Subjects | |
Online Access | Get full text |
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Summary: | A system for processing a semiconductor wafer comprises: a processing chamber; a heat source; a substrate holder configured to expose a semiconductor wafer to the heat source; a first electrode configured to be detachably coupled to a first major surface of the semiconductor wafer; and a second electrode coupled to the substrate holder, wherein the first electrode and the second electrode are configured to apply an electric field to the semiconductor wafer together.
반도체 웨이퍼를 처리하기 위한 시스템으로서, 처리 챔버; 열원; 반도체 웨이퍼를 열원에 노출시키도록 구성된 기판 홀더; 반도체 웨이퍼의 제1 주표면에 분리 가능하게 결합되도록 구성된 제1 전극; 및 상기 기판 홀더에 결합된 제2 전극을 포함하고, 상기 제1 전극 및 상기 제2 전극은 함께 상기 반도체 웨이퍼에 전기장을 인가하도록 구성되는 시스템이 개시된다. |
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Bibliography: | Application Number: KR20220025524 |