Low Power Frequency Synthesizing Apparatus
Disclosed is technology relating to an electronic circuit, especially a phase locked loop or a frequency synthesis apparatus. The frequency synthesis apparatus includes an injection-synchronous frequency de-multiplier, and a replicated frequency de-multiplier having the same circuit composition as t...
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Main Authors | , , , , , , , |
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Format | Patent |
Language | English Korean |
Published |
17.05.2022
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Subjects | |
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Abstract | Disclosed is technology relating to an electronic circuit, especially a phase locked loop or a frequency synthesis apparatus. The frequency synthesis apparatus includes an injection-synchronous frequency de-multiplier, and a replicated frequency de-multiplier having the same circuit composition as that of the injection-synchronous frequency de-multiplier. The replicated frequency de-multiplier is used to determine a control value required for self-oscillation with a target frequency. If the injection-synchronous frequency de-multiplier fails in injection synchronism at the first attempt, the injection synchronism can be attempted with the determined control value. The control value of the injection synchronous frequency de-multiplier at the first attempt can be predetermined in accordance with a temperature and a supply voltage and stored. Therefore, the present invention is capable of achieving low latency and low-power operation, and reducing a chip area.
전자 회로, 특히 위상 고정 루프(Phase Locked Loop) 혹은 주파수 합성 장치에 관한 기술이 개시된다. 주파수 합성 장치는 주입 동기 주파수 분주기와, 그리고 그 주입 동기 주파수 분주기와 동일한 회로 구성을 가지는 복제 주파수 분주기를 포함한다. 복제 주파수 분주기를 이용하여 목표로 하는 주파수로 자기 발진하는데 필요한 제어 값이 결정된다. 최초 시도에서 주입 동기 주파수 분주기가 주입 동기에 실패하면, 결정된 제어 값을 이용하여 주입 동기를 시도할 수 있다. 최초 시도에서 주입 동기 주파수 분주기의 제어 값은 온도와 공급 전압에 따라 사전에 결정되고 저장될 수 있다. |
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AbstractList | Disclosed is technology relating to an electronic circuit, especially a phase locked loop or a frequency synthesis apparatus. The frequency synthesis apparatus includes an injection-synchronous frequency de-multiplier, and a replicated frequency de-multiplier having the same circuit composition as that of the injection-synchronous frequency de-multiplier. The replicated frequency de-multiplier is used to determine a control value required for self-oscillation with a target frequency. If the injection-synchronous frequency de-multiplier fails in injection synchronism at the first attempt, the injection synchronism can be attempted with the determined control value. The control value of the injection synchronous frequency de-multiplier at the first attempt can be predetermined in accordance with a temperature and a supply voltage and stored. Therefore, the present invention is capable of achieving low latency and low-power operation, and reducing a chip area.
전자 회로, 특히 위상 고정 루프(Phase Locked Loop) 혹은 주파수 합성 장치에 관한 기술이 개시된다. 주파수 합성 장치는 주입 동기 주파수 분주기와, 그리고 그 주입 동기 주파수 분주기와 동일한 회로 구성을 가지는 복제 주파수 분주기를 포함한다. 복제 주파수 분주기를 이용하여 목표로 하는 주파수로 자기 발진하는데 필요한 제어 값이 결정된다. 최초 시도에서 주입 동기 주파수 분주기가 주입 동기에 실패하면, 결정된 제어 값을 이용하여 주입 동기를 시도할 수 있다. 최초 시도에서 주입 동기 주파수 분주기의 제어 값은 온도와 공급 전압에 따라 사전에 결정되고 저장될 수 있다. |
Author | PU YOUNG GUN PARK DONG SOO JO JONG WAN KIM JAE BIN JANG BYEONG GI KIM YUN GWAN LEE KANG YOON PARK JOON HONG |
Author_xml | – fullname: JO JONG WAN – fullname: PARK DONG SOO – fullname: KIM YUN GWAN – fullname: JANG BYEONG GI – fullname: PARK JOON HONG – fullname: LEE KANG YOON – fullname: PU YOUNG GUN – fullname: KIM JAE BIN |
BookMark | eNrjYmDJy89L5WTQ8skvVwjIL08tUnArSi0sTc1LrlQIrswryUgtzqzKzEtXcCwoSCxKLCkt5mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8d5BRgZGRgYGZsYm5saOxsSpAgDX7ivW |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
DocumentTitleAlternate | 저전력 주파수 합성 장치 |
ExternalDocumentID | KR20220063473A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_KR20220063473A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 14:49:57 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English Korean |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_KR20220063473A3 |
Notes | Application Number: KR20200149355 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220517&DB=EPODOC&CC=KR&NR=20220063473A |
ParticipantIDs | epo_espacenet_KR20220063473A |
PublicationCentury | 2000 |
PublicationDate | 20220517 |
PublicationDateYYYYMMDD | 2022-05-17 |
PublicationDate_xml | – month: 05 year: 2022 text: 20220517 day: 17 |
PublicationDecade | 2020 |
PublicationYear | 2022 |
RelatedCompanies | RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY SKAICHIPS CO., LTD |
RelatedCompanies_xml | – name: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY – name: SKAICHIPS CO., LTD |
Score | 3.3769336 |
Snippet | Disclosed is technology relating to an electronic circuit, especially a phase locked loop or a frequency synthesis apparatus. The frequency synthesis apparatus... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE |
Title | Low Power Frequency Synthesizing Apparatus |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220517&DB=EPODOC&locale=&CC=KR&NR=20220063473A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQsQRNMxqnJuoapRgl6YL2SuomgW5NTbRINjY3Tk5NM04G7Xf29TPzCDXxijCNYGLIge2FAZ8TWg4-HBGYo5KB-b0EXF4XIAaxXMBrK4v1kzKBQvn2biG2LmrQ3jFo16ihuZqLk61rgL-Lv7Oas7Otd5CaXxBEDlgdm5gbOzIzsIIa0qCT9l3DnED7UgqQKxU3QQa2AKB5eSVCDEzZ-cIMnM6wu9eEGTh8oVPeQCY09xWLMGj55JcrBICuNVNwK4Isga5UCK7MA7bhijOrgHWQArBNCTrKu7RYlEHZzTXE2UMXaGk83I_x3kHILjQWY2AB9v5TJRgUTC0Sk4HVdJpBkqm5SVIq6GyYJIs0c2CrICXZFNj4kGSQwWeSFH5paQYuEBc0HW5oLsPAUlJUmioLrGVLkuTAgQMAtJJ_Vg |
link.rule.ids | 230,309,786,891,25594,76903 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQsQRNMxqnJuoapRgl6YL2SuomgW5NTbRINjY3Tk5NM04G7Xf29TPzCDXxijCNYGLIge2FAZ8TWg4-HBGYo5KB-b0EXF4XIAaxXMBrK4v1kzKBQvn2biG2LmrQ3jFo16ihuZqLk61rgL-Lv7Oas7Otd5CaXxBEDlgdm5gbOzIzsJoDO4XgzlKYE2hfSgFypeImyMAWADQvr0SIgSk7X5iB0xl295owA4cvdMobyITmvmIRBi2f_HKFANC1ZgpuRZAl0JUKwZV5wDZccWYVsA5SALYpQUd5lxaLMii7uYY4e-gCLY2H-zHeOwjZhcZiDCzA3n-qBIOCqUViMrCaTjNIMjU3SUoFnQ2TZJFmDmwVpCSbAhsfkgwy-EySwi8tz8DpEeLrE-_j6ectzcAFkgJNjRuayzCwlBSVpsoCa9ySJDlwQAEAzayCQA |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Low+Power+Frequency+Synthesizing+Apparatus&rft.inventor=JO+JONG+WAN&rft.inventor=PARK+DONG+SOO&rft.inventor=KIM+YUN+GWAN&rft.inventor=JANG+BYEONG+GI&rft.inventor=PARK+JOON+HONG&rft.inventor=LEE+KANG+YOON&rft.inventor=PU+YOUNG+GUN&rft.inventor=KIM+JAE+BIN&rft.date=2022-05-17&rft.externalDBID=A&rft.externalDocID=KR20220063473A |