SEMICONDUCTOR DEVICE
A semiconductor device (1) includes a p-type region (14) including superlattice pseudo mixed crystal regions (14a,14b) in which a first layer (14a) and a second layer (14b) are alternately stacked. The first layer includes a gallium oxide-based semiconductor. The second layer includes a p-type semic...
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Main Author | |
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Format | Patent |
Language | English Korean |
Published |
18.04.2022
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor device (1) includes a p-type region (14) including superlattice pseudo mixed crystal regions (14a,14b) in which a first layer (14a) and a second layer (14b) are alternately stacked. The first layer includes a gallium oxide-based semiconductor. The second layer includes a p-type semiconductor made of a material different from that of the first layer.
반도체 장치(1)는 제1 층(14a) 및 제2 층(14b)이 교호식으로 적층되어 있는 초격자 의사 혼정 영역(14a, 14b)을 포함하는 p형 영역(14)을 포함한다. 제1 층은 산화갈륨계 반도체를 포함한다. 제2 층은 제1 층과는 상이한 재료로 구성되는 p형 반도체를 포함한다. |
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Bibliography: | Application Number: KR20210132071 |