3D NAND METHOD AND APPARATUS TO MITIGATE HOT ELECTRON READ DISTURBS IN 3D NAND DEVICES

The present invention relates to an apparatus, method, and system for mitigating hot electronic read distortions in 3D NAND devices. The method comprises: a step of implementing an erase operation for a deck of a superblock, block, or sub-block of a three-dimensional (3D) nonvolatile memory device t...

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Bibliographic Details
Main Authors PARAT KRISHNA, RAMANAN NARAYANAN, SUN XIN, KIM HYUNGSEOK, JOSHI AMOL R, YU XUEHONG, FASTOW RICHARD M, CAO WEI
Format Patent
LanguageEnglish
Korean
Published 04.02.2022
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:The present invention relates to an apparatus, method, and system for mitigating hot electronic read distortions in 3D NAND devices. The method comprises: a step of implementing an erase operation for a deck of a superblock, block, or sub-block of a three-dimensional (3D) nonvolatile memory device to obtain an erased deck; a step of applying a dummy read pulse to at least one word line (WL) of the deck to be read of the superblock, block, or sub-block; and a step of implementing a read operation for at least one memory cell for reading data from the at least one memory cell corresponding to the at least one WL after applying the dummy read pulse. 장치, 방법, 및 시스템. 방법은 소거된 데크를 획득하기 위해 3차원(3D) 비휘발성 메모리 디바이스의 수퍼블록, 블록 또는 서브블록의 데크에 대한 소거 동작을 구현하는 단계; 수퍼블록, 블록 또는 서브블록의 판독될 데크의 하나 이상의 워드라인(WL)에 더미 판독 펄스를 인가하는 단계; 및 더미 판독 펄스의 인가 후에, 하나 이상의 WL에 대응하는 하나 이상의 메모리 셀로부터 데이터를 판독하기 위해 하나 이상의 메모리 셀에 대한 판독 동작을 구현하는 단계를 포함한다.
Bibliography:Application Number: KR20200177322