METHOD OF FABRICATING SEMICONDUCTOR DEVICES HAVING DIFFERENT ARCHITECTURES AND SEMICONDUCTOR DEVICES FABRICATED THEREBY

A method of manufacturing a semiconductor device based on a dual architecture compatible design includes the steps of: forming a transistor component in a transistor (TR) layer; and performing one of a step (A) of manufacturing an additional component according to a buried power rail (BPR) type arch...

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Main Authors CHANG TZU CHING, CHEN WEI CHIH, FU CHIN MING, HSIEH CHENG HSIANG, CHEN CHUNG HUI, SHEEN RUEY BIN, CHEN WAN TE
Format Patent
LanguageEnglish
Korean
Published 08.12.2021
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Summary:A method of manufacturing a semiconductor device based on a dual architecture compatible design includes the steps of: forming a transistor component in a transistor (TR) layer; and performing one of a step (A) of manufacturing an additional component according to a buried power rail (BPR) type architecture or a step (B) of manufacturing the additional component according to a non-buried power rail (non-BPR) type architecture. The step (A) includes a step of forming various non-dummy sub-TR structures in corresponding sub-TR layer, and a step of forming various dummy supra-TR structures in a corresponding supra-TR layer, wherein the dummy structure is a corresponding first artifact. The step (B) includes a step of forming various non-dummy supra-TR structures in a corresponding supra-TR layer, and forming various dummy supra-TR structures, wherein the dummy structure is a corresponding second artifact, and the first and second artifacts are generated by a dual architecture compatible design suitable for adaptation to a BPR type architecture. 이중 아키텍처 호환 설계에 기초하여 반도체 디바이스를 제조하는 방법은: 트랜지스터(TR)층에 트랜지스터 컴포넌트를 형성하는 단계; 및 (A) 매립 전력 레일(BPR) 유형의 아키텍처에 따라 추가 컴포넌트를 제조하는 단계 또는 (B) 비-매립 전력 레일(비-BPR) 유형의 아키텍처에 따라 추가 컴포넌트를 제조하는 단계 중 하나를 수행하는 단계를 포함한다. 단계 (A)는, 대응하는 TR-하위층에, 다양한 비-더미 TR-하위 구조물을 형성하는 단계, 및, 대응하는 TR-상위층에, 대응하는 제1 아티팩트인 다양한 더미 TR-상위 구조물을 형성하는 단계를 포함한다. 단계 (B)는, 대응하는 TR-상위층에, 다양한 비-더미 TR-상위 구조물을 형성하고 대응하는 제2 아티팩트인 다양한 더미 TR-상위 구조물을 형성하는 단계를 포함하며, 제1 및 제2 아티팩트는 이중 아키텍처 호환 설계가 BPR 유형의 아키텍처로의 적응에 적합함으로써 초래된다.
Bibliography:Application Number: KR20210059532