VOLTAGE CONTROLLED DELAY LINE GAIN CALIBRATION
A delay-locked loop includes: a phase detector configured to detect a phase difference between a first clock and a second clock; a charge pump configured to increase a charge amount in a capacitive load according to a first charge amount, and decrease a charge amount in a capacitive load according t...
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Main Authors | , , , |
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Format | Patent |
Language | English Korean |
Published |
28.07.2021
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Subjects | |
Online Access | Get full text |
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Summary: | A delay-locked loop includes: a phase detector configured to detect a phase difference between a first clock and a second clock; a charge pump configured to increase a charge amount in a capacitive load according to a first charge amount, and decrease a charge amount in a capacitive load according to a second charge amount, based on the phase difference provided by the phase detector; a sample and hold circuit configured to receive the charge amount from the capacitive load and hold the charge; and a voltage controlled delay line configured to select an amount of delay based on the charge amount received from the sample and hold circuit. At least one parameter of the delay-locked loop is configured such that a desired pump current ratio of the delay cell is achieved by adjusting the delay amount of the delay cell and/or the amount of current coupled to the delay cell.
지연 고정 루프는 제 1 클럭과 제 2 클럭 사이의 위상차를 검출하도록 구성된 위상 검출기, 위상 검출기에 의해 제공된 위상차에 기초하여 제 1 충전량에 따라 용량성 부하에서 충전량을 증가시키고 제 2 충전량에 따라 용량성 부하에서 충전량을 감소시키도록 구성된 충전 펌프, 용량성 부하로부터 충전량을 수신하고 충전량을 홀드하도록 구성된 샘플 및 홀드 회로, 및 샘플 및 홀드 회로로부터 수신된 충전량에 기초하여 지연량을 선택하도록 구성된 전압 제어 지연 라인을 포함한다. 지연 고정 루프의 적어도 하나의 파라미터는 지연 셀의 원하는 펌프 전류 비가 지연 셀의 지연량 및/또는 지연 셀에 결합된 전류량을 조정함으로써 달성되도록 구성된다. |
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Bibliography: | Application Number: KR20200067606 |