Memory system and method of training the memory system

A memory system includes a memory medium and a memory controller configured to control the memory medium. The memory controller includes: a training core configured to detect a delay time of a clock signal to generate a delay selection signal during a training operation for the memory medium; and a...

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Bibliographic Details
Main Author CHOE WOO YOUNG
Format Patent
LanguageEnglish
Korean
Published 11.06.2021
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A memory system includes a memory medium and a memory controller configured to control the memory medium. The memory controller includes: a training core configured to detect a delay time of a clock signal to generate a delay selection signal during a training operation for the memory medium; and a training block configured to generate a delayed clock signal which is delayed by a time period set according to the delay selection signal outputted from the training core. Therefore, it is possible to reduce a logical size of the training block and shorten a training time. 메모리 시스템은, 메모리 미디어, 및 메모리 미디어를 제어하는 메모리 컨트롤러를 포함한다. 메모리 컨트롤러는, 메모리 미디어에 대한 트레이닝 동작을 수행하는 과정에서 클럭 신호의 지연 시간을 파악하여 지연 선택 신호를 발생시키는 트레이닝 코어와, 트레이닝 코어로부터의 지연 선택 신호에 응답하여 지연 선택 신호에 의해 지정된 시간만큼 지연된 지연 클럭 신호를 발생시키는 트레이닝 블록을 포함한다.
Bibliography:Application Number: KR20190159427