HANDLING LOSS OF POWER FOR UNINTERRUPTIBLE POWER SUPPLY EFFICIENCY

Described are mechanisms and methods for reducing CPU power upon interruption of supplied power. According to some embodiments of the present invention, a device may comprise an input to receive an indicator that a supply voltage to a computer system has been interrupted. The device may comprise an...

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Bibliographic Details
Main Authors LEHWALDER PHILIP, KUO CHIA HUNG S, GIHON ARIK
Format Patent
LanguageEnglish
Korean
Published 31.05.2021
Subjects
CALCULATING
CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTINGELECTRIC POWER
COMPUTING
CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
GENERATION
PHYSICS
SYSTEMS FOR STORING ELECTRIC ENERGY
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Summary:Described are mechanisms and methods for reducing CPU power upon interruption of supplied power. According to some embodiments of the present invention, a device may comprise an input to receive an indicator that a supply voltage to a computer system has been interrupted. The device may comprise an output to provide an indicator to reduce a processor power consumption level. The device may also comprise a circuitry to establish the indicator to reduce the processor power level based upon the indicator that the supply voltage to the computer system has been interrupted. 공급 전력의 중단 시에 CPU 전력을 감소시키기 위한 메커니즘들 및 방법들이 설명된다. 일부 실시예들에서, 장치는 컴퓨터 시스템에 대한 공급 전압이 중단되었다는 표시자를 수신하는 입력을 포함할 수 있다. 장치는 프로세서 전력 소비 레벨을 감소시키기 위한 표시자를 제공하는 출력을 포함할 수 있다. 장치는 또한 컴퓨터 시스템에 대한 공급 전압이 중단되었다는 표시자에 기초하여 프로세서 전력 레벨을 감소시키기 위한 표시자를 확립하는 회로를 포함할 수 있다.
Bibliography:Application Number: KR20200112906