TRANSISTOR SPACER STRUCTURES

• Main Author: YANG CHANSYUN DAVID
• Format: Patent
• Language: English; Korean
• Published: 08.04.2021
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Disclosed is a method for forming a gate spacer structure having pores in order to reduce parasitic capacitance between a gate structure and a source/drain contact in a transistor. According to some embodiments, the method comprises a step of forming a gate structure on a substrate, and building a s...