MULTILAYER CERAMIC CAPACITOR AND MANUFACTURING METHOD THEREOF

• Main Authors: INOMATA YASUYUKI, HAGIWARA TOMOYA, KANEDA KAZUMI
• Format: Patent
• Language: English; Korean
• Published: 27.01.2021
• Subjects: ARTIFICIAL STONE; BASIC ELECTRIC ELEMENTS; CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES ORLIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE; CEMENTS; CERAMICS; CHEMISTRY; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDINGMATERIALS; CONCRETE; ELECTRICITY; LIME, MAGNESIA; METALLURGY; REFRACTORIES; SLAG; TREATMENT OF NATURAL STONE

Provided is a stacked ceramic capacitor having excellent DC bias properties and capable of ensuring high reliability even when a thickness of a dielectric layer is reduced. A stacked ceramic capacitor (10) includes a stacked body (20) in which dielectric layers (17) and internal electrode layers (18) are alternately stacked. The dielectric layers (17) include (Ba_(1-x-y)Ca_xSr_y)_m(Ti_(1-z)Zr_z)O_3, where 0.03<=x<=0.16, 0<=y<=0.02, 0<z<=0.02, and 0.99<=m<=1.02, and include 1.0 to 4.0 mol of an Re oxide (Re is a rare earth element) in an equivalent element, 0.2 to 2.5 mol of an Mg compound in an equivalent element, 0.1 to 1.0 mol of an Mn compound in an equivalent element, 0.1 to 2.0 mol of a Zr compound in an equivalent element, 0.05 to 0.3 mol of a V compound in an equivalent element, and 0.2 to 5.0 mol of an Si compound in an equivalent element. DC 바이어스 특성이 우수하고, 유전체층의 두께가 작아진 경우에도 높은 신뢰성을 확보할 수 있는 적층 세라믹 콘덴서를 제공한다. 적층 세라믹 콘덴서(10)는, 유전체층(17)과 내부 전극층(18)이 교대로 적층된 적층체(20)를 구비한다. 유전체층(17)은, (Ba(1-x-y)CaxSry)m(Ti(1-z)Zrz)O3, 단, 0.03≤x≤0.16, 0≤y≤0.02, 0<z≤0.02, 0.99≤m≤1.02를 포함하고, 또한 Re 산화물(Re는 희토류 원소)을 원소 환산으로 1.0 내지 4.0mol, Mg 화합물을 원소 환산으로 0.2 내지 2.5mol, Mn 화합물을 원소 환산으로 0.1 내지 1.0mol, Zr 화합물을 원소 환산으로 0.1 내지 2.0mol, V 화합물을 원소 환산으로 0.05 내지 0.3mol, Si 화합물을 원소 환산으로 0.2 내지 5.0mol을 포함한다