VERTICAL MEMORY DEVICE

• Main Authors: CHA SEON YONG, CHUNG SU OCK, KIM SEUNG HWAN
• Format: Patent
• Language: English; Korean
• Published: 20.01.2021
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The present technique relates to a vertically stacked three-dimensional memory device which can reduce parasitic capacitance. According to the present technique, the memory device comprises: a first memory cell mat including a first multi-layered sub-word line positioned on an upper portion of a sub...