ZERO MASK HIGH DENSITY CAPACITOR

Provided are methods for eliminating use of additional masks, and semiconductor devices. A first interconnect layer is formed. A first resistive layer is formed on an upper portion of the first interconnect layer. A dielectric layer is formed on an upper portion of the first resistive layer. A secon...

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Bibliographic Details
Main Authors WU CHIA TIEN, HSIEH CHENG HSIANG, CHEN CHUNG HUI, CHEN WAN TE
Format Patent
LanguageEnglish
Korean
Published 03.12.2020
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Provided are methods for eliminating use of additional masks, and semiconductor devices. A first interconnect layer is formed. A first resistive layer is formed on an upper portion of the first interconnect layer. A dielectric layer is formed on an upper portion of the first resistive layer. A second resistive layer is formed on an upper portion of the dielectric layer. 추가 마스크의 사용을 제거하는 방법 및 반도체 다바이스가 본 명세서에 설명된다. 제 1 상호 접속 층이 형성된다. 제 1 상호 접속 층의 상부에 제 1 저항 층이 형성된다. 제 1 저항 층의 상부에 유전체 층이 형성된다. 유전체 층의 상부에 제 2 저항 층이 형성된다.
Bibliography:Application Number: KR20200027875