Method of sawing substrate and method of singulating semiconductor chips
Provided is a substrate sawing method, in a substrate having a device region and a scribe lane region, which comprises the steps of: selectively forming a passivation layer in the device region of the substrate; selectively forming a self-assembled monolayer which is self-assembled, on the passivati...
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| Main Authors | , , , |
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| Format | Patent |
| Language | English Korean |
| Published |
31.03.2020
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| Subjects | |
| Online Access | Get full text |
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| Abstract | Provided is a substrate sawing method, in a substrate having a device region and a scribe lane region, which comprises the steps of: selectively forming a passivation layer in the device region of the substrate; selectively forming a self-assembled monolayer which is self-assembled, on the passivation layer; and conducting plasma sawing on the scribe lane region.
디바이스 영역과 스크라이브 레인 영역을 갖는 기판에 있어서, 상기 기판의 상기 디바이스 영역에 선택적으로 패시베이션 층을 형성하는 단계; 상기 패시베이션 층 상에 자기 조립적으로 자기 조립 모노레이어(self-assembled monolayer)를 선택적으로 형성하는 단계; 및 상기 스크라이브 레인 영역을 플라스마 쏘잉(plasma sawing)하는 단계를 포함하는 기판 쏘잉 방법이 제공된다. |
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| AbstractList | Provided is a substrate sawing method, in a substrate having a device region and a scribe lane region, which comprises the steps of: selectively forming a passivation layer in the device region of the substrate; selectively forming a self-assembled monolayer which is self-assembled, on the passivation layer; and conducting plasma sawing on the scribe lane region.
디바이스 영역과 스크라이브 레인 영역을 갖는 기판에 있어서, 상기 기판의 상기 디바이스 영역에 선택적으로 패시베이션 층을 형성하는 단계; 상기 패시베이션 층 상에 자기 조립적으로 자기 조립 모노레이어(self-assembled monolayer)를 선택적으로 형성하는 단계; 및 상기 스크라이브 레인 영역을 플라스마 쏘잉(plasma sawing)하는 단계를 포함하는 기판 쏘잉 방법이 제공된다. |
| Author | JEON CHANG SEONG LEE TEAK HOON SHIN SEUNG HUN YOO JAE KYUNG |
| Author_xml | – fullname: JEON CHANG SEONG – fullname: SHIN SEUNG HUN – fullname: YOO JAE KYUNG – fullname: LEE TEAK HOON |
| BookMark | eNrjYmDJy89L5WTw8E0tychPUchPUyhOLM_MS1coLk0qLilKLElVSMxLUchFSAMlS3MSS8BqUnMzk_PzUkqTS_KLFJIzMguKeRhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJvHeQkYGRgYGBsYmpgbGjMXGqAL1LNy8 |
| ContentType | Patent |
| DBID | EVB |
| DatabaseName | esp@cenet |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Medicine Chemistry Sciences |
| DocumentTitleAlternate | 기판 쏘잉 방법 및 반도체 칩의 싱귤레이션 방법 |
| ExternalDocumentID | KR20200034503A |
| GroupedDBID | EVB |
| ID | FETCH-epo_espacenet_KR20200034503A3 |
| IEDL.DBID | EVB |
| IngestDate | Fri Oct 04 04:58:23 EDT 2024 |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English Korean |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-epo_espacenet_KR20200034503A3 |
| Notes | Application Number: KR20180114376 |
| OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200331&DB=EPODOC&CC=KR&NR=20200034503A |
| ParticipantIDs | epo_espacenet_KR20200034503A |
| PublicationCentury | 2000 |
| PublicationDate | 20200331 |
| PublicationDateYYYYMMDD | 2020-03-31 |
| PublicationDate_xml | – month: 03 year: 2020 text: 20200331 day: 31 |
| PublicationDecade | 2020 |
| PublicationYear | 2020 |
| RelatedCompanies | SAMSUNG ELECTRONICS CO., LTD |
| RelatedCompanies_xml | – name: SAMSUNG ELECTRONICS CO., LTD |
| Score | 3.2384229 |
| Snippet | Provided is a substrate sawing method, in a substrate having a device region and a scribe lane region, which comprises the steps of: selectively forming a... |
| SourceID | epo |
| SourceType | Open Access Repository |
| SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| Title | Method of sawing substrate and method of singulating semiconductor chips |
| URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200331&DB=EPODOC&locale=&CC=KR&NR=20200034503A |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_mFPVNp-LHlIDSt2Il7Vwfirh-UBzdRpmyt9FkKQ61LWtl_76XrHN72luSCyEc_HKX5O53AA_U7CamwW1dWJzqpvVs64nBbL3D0Th0xVMqVM3IaNAJ3823iTVpwPc6F0bxhC4VOSIiiiPeK3VeF5tHLE_FVpaPbI5D-Uswdjytvh3LSCs8VLye44-G3tDVXNfpx9ogXskMaloGfd2DfelIS6Z9_6Mn81KKbaMSnMDBCNfLqlNofOUtOHLXtddacBjVX97YrNFXnkEYqXLPJE9JmSzR5pASYa_oZUmSzcjPRoxCVZdLzpHh73kmeV3zBeGf86I8h_vAH7uhjlua_mtg2o-3908voJnlmbgEwtFBMziCjlFqMjGzGfoXFrN4ymT8EruC9q6VrneLb-BYdlcpeG1oVotfcYs2uGJ3SnV_RFSKpA |
| link.rule.ids | 230,309,786,891,25594,76903 |
| linkProvider | European Patent Office |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dT8IwEL8gGvFNUeMHahMNb4sz3YA9LEY2yBQ2CJmGt2UtWyTqtrAZ_n2vZQhPvDX9NZdLk1-v194HwAPVOqGmckOJdE4VTW8bSqgyQ2lxNA6d6CmOZM9I12s579rbVJ9W4HudCyPrhC5lcURkFEe-F_K8zjaPWLaMrcwf2Ryn0ue-b9rN0jsWkVZ4qNhdszce2SOraVnmYNL0JitMpZqu0pc92G-jUyidpY-uyEvJto1K_xgOxigvKU6g8pXWoWate6_V4dAtv7xxWLIvPwXHle2eSRqTPFyizSE50l6WlyVhMiM_GxhB2ZdLrBHh72ki6rqmC8I_51l-Bvf9nm85CqoU_O9AMJhs60_PoZqkSXQBhOMFTeVIOkapxqKZwfB-oTOdx0zEL7FLaOySdLUbvoOa47vDYPjqDa7hSECrdLwGVIvFb3SD9rhgt3Ib_wDldo2O |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Method+of+sawing+substrate+and+method+of+singulating+semiconductor+chips&rft.inventor=JEON+CHANG+SEONG&rft.inventor=SHIN+SEUNG+HUN&rft.inventor=YOO+JAE+KYUNG&rft.inventor=LEE+TEAK+HOON&rft.date=2020-03-31&rft.externalDBID=A&rft.externalDocID=KR20200034503A |