METHOD OF FORMING REDISTRIBUTION LAYER USING PHOTOSINTERING

The present invention relates to a method of forming a redistribution layer using photosintering and, more specifically, to a redistribution layer formed by the method. According to the present invention, IPL exposure is selectively performed in some cases, and metal patterning is possible within a...

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Main Authors JUNG KWANG HO, MIN KYUNG DEUK, LEE CHOONG JAE, JUNG SEUNG BOO, MYUNG WOO RAM, JEONG HAK SAN, PARK BUM GEUN
Format Patent
LanguageEnglish
Korean
Published 04.11.2019
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Summary:The present invention relates to a method of forming a redistribution layer using photosintering and, more specifically, to a redistribution layer formed by the method. According to the present invention, IPL exposure is selectively performed in some cases, and metal patterning is possible within a few seconds using a photothermal effect. In addition, since no acid solution is used, there is no problem of environmental hazard, toxicity, etc., the process step is easy, and no expensive vacuum equipment is required. In particular, according to the present invention, a process time is significantly shortened. A conventional thermal sintering took at least 30 minutes or more, and plating or vacuum processes took several hours. However, in the present invention, the process is completed within tens of seconds (within 10 seconds under 10 pulse conditions) through photosintering. In the present invention, a multi-layered pattern can be easily implemented through a process using a photothermal effect, thereby being advantageous to implement a high density electronic package. 본 발명은 광소결을 이용해 재배선층을 형성하는 방법에 관한 것이고, 이러한 방법에 의해 형성된 재배선층에 관한 것이다. 본 발명에 따르면, 경우에 따라서 선택적으로 IPL 노출하고, 광열 효과를 이용하여 수 초 이내 금속 패터닝 가능하다. 또한, 산용액 등을 사용하지 않아, 환경유해성, 독성 등의 문제가 없으며, 공정단계가 간편하고, 고가의 진공장비가 필요없는 장점을 갖는다. 특히 본 발명에서는 공정시간이 획기적으로 단축되었는데, 기존의 열 소결의 경우 최소 30분 이상의 시간이 걸렸고, 도금이나 진공 공정의 경우 수 시간이 걸렸으나, 본 발명에서는 광소결을 통해 수십초(10번의 펄스 조건에서 10초 이내) 이내에서 공정이 완료된다. 본 발명에서는, 광열 효과를 이용한 공정을 통하여, 다층의 패턴을 쉽게 구현 가능하여, 고집적도의 전자패키지 구현에 유리하다.
Bibliography:Application Number: KR20180047651