Semiconductor device and Method for fabricating thereof

A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a lamination structure in which a conductive film and an interlayer insulating film are alternately laminated, a channel hole which passes through the lamination structure and includes a low...

Full description

Saved in:
Bibliographic Details
Main Authors KIM, HONG SUK, AHN, JAE YOUNG, KIM, SUNG GIL, NOH, JIN TAE, CHOI, JI HOON, KIM, SEUL YE
Format Patent
LanguageEnglish
Korean
Published 16.01.2019
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a lamination structure in which a conductive film and an interlayer insulating film are alternately laminated, a channel hole which passes through the lamination structure and includes a lower region and an upper region on the lower region, a dielectric film which is formed on the sidewall of the lower region, a channel film which is formed on the dielectric film, in the lower region, a passivation film which is formed on the channel film in the lower region and separates the lower region and the upper region, and an air gap which is surrounded by the passivation film and is defined in the lower region. The width of the air gap is larger than the width of the passivation film. It is possible to provide a semiconductor device with increased operational performance. 반도체 장치 및 그 제조 방법이 제공된다. 상기 반도체 장치는 도전막 및 층간 절연막이 교대로 적층된 적층 구조, 상기 적층 구조를 관통하고, 하부 영역과 상기 하부 영역 상의 상부 영역을 포함하는 채널홀, 상기 하부 영역의 측벽 상에 형성되는 유전막, 상기 하부 영역에서, 상기 유전막 상에 형성되는 채널막, 상기 하부 영역에서 상기 채널막 상에 형성되고, 상기 하부 영역과 상기 상부 영역을 분리시키는 패시베이션막 및 상기 패시베이션막에 둘러싸여 상기 하부 영역에 정의되는 에어갭을 포함하되, 상기 에어갭의 폭은 상기 패시베이션막의 폭보다 크다.
Bibliography:Application Number: KR20170085703