Semiconductor device
The present invention relates to a semiconductor device having both a nonvolatile memory cell with retention characteristics and a random access memory cell requiring quick operation and low power. The semiconductor device includes a chip stacked body in which a second semiconductor chip is stacked...
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Main Authors | , |
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Format | Patent |
Language | English Korean |
Published |
10.10.2018
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Subjects | |
Online Access | Get full text |
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Summary: | The present invention relates to a semiconductor device having both a nonvolatile memory cell with retention characteristics and a random access memory cell requiring quick operation and low power. The semiconductor device includes a chip stacked body in which a second semiconductor chip is stacked on a first semiconductor chip. The first semiconductor chip includes a first substrate and a first magnetic tunnel junction on the first substrate. The second semiconductor chip includes a second substrate and a second magnetic tunnel junction on the second substrate. The first critical current density required for flux reversal of the first magnetic tunnel junction is different from the second critical current density required for flux reversal of the second magnetic tunnel junction.
본 발명은 반도체 소자에 관한 것으로, 제1 반도체 칩 상에 제2 반도체 칩이 적층된 칩 적층체를 포함하고, 상기 제1 반도체 칩은 제1 기판 및 상기 제1 기판 상의 제1 자기터널 접합을 포함하고, 상기 제2 반도체 칩은 제2 기판 및 상기 제2 기판 상의 제2 자기터널접합을 포함하되, 상기 제1 자기터널접합의 자화 반전을 위해 요구되는 제1 임계 전류 밀도는 상기 제2 자기터널접합의 자화 반전을 위해 요구되는 제2 임계 전류 밀도와 다른 반도체 소자가 제공된다. |
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Bibliography: | Application Number: KR20170038650 |