집적 오실레이터 회로

• Main Authors: DAS SHIDHARTHA, SAVANTH PARAMESHWARAPPA ANAND KUMAR, SANDHU BAL S, MYERS JAMES EDWARD, BULL DAVID MICHAEL
• Format: Patent
• Language: Korean
• Published: 17.09.2018
• Subjects: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES; BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; GENERATION OF NOISE BY SUCH CIRCUITS; GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING,BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN ANON-SWITCHING MANNER; PULSE TECHNIQUE

본 명세서에서 설명되는 다양한 실시예는 집적회로에 관한 것이다. 집적회로는, 제1 소스 전압(Vdd)과는 독립적인 기간을 갖는 클록 신호(CLK)를 제공하도록 배치된 비교기 스테이지(212), 저항(R1), 커패시터(C1), 및 액티브 스위치(M1, M2)를 포함할 수 있다. 독립은, 고정 비율로서 제1 소스 전압(Vdd)으로부터 얻어지는 제2 소스 전압(Vref)을 사용함으로써 달성될 수 있다. Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a comparator stage, a resistor, a capacitor, and active switches arranged to provide a clock signal having a time period that is independent of a first source voltage. Independence may be achieved by using a second source voltage derived from the first source voltage as a fixed ratio.