Logarithmic counter

Disclosed is a logarithmic counter for removing a noise generated in an image sensor. The logarithmic counter comprises: a rest control block for generating a plurality of reset signals having different on-time periods; a first frequency divider for generating a plurality of clock signals having dif...

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Bibliographic Details
Main Authors SONG, MIN KYU, KIM, YUN JEONG
Format Patent
LanguageEnglish
Korean
Published 07.03.2018
Subjects
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PICTORIAL COMMUNICATION, e.g. TELEVISION
PULSE TECHNIQUE
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Summary:Disclosed is a logarithmic counter for removing a noise generated in an image sensor. The logarithmic counter comprises: a rest control block for generating a plurality of reset signals having different on-time periods; a first frequency divider for generating a plurality of clock signals having different division ratios according to the reset signal; a counter control block for generating a counter signal; a multiplexer for selecting and outputting any one of outputs of the first frequency divider by using the counter signal; and a second frequency divider for receiving an output of the multiplexer, and generating a plurality of output signals having different division ratios. 온 타임 구간이 상이한 복수의 리셋 신호를 생성하는 리셋 제어 블록; 상기 리셋 신호에 따라 상이한 분주비를 갖는 복수의 클럭 신호를 생성하는 제1 주파수 분주기; 카운터 신호를 생성하는 카운터 제어 블록; 상기 카운터 신호를 이용하여 상기 제1 주파수 분주기의 출력 중 어느 하나를 선택하여 출력하는 멀티플렉서; 및 상기 멀티플렉서의 출력을 입력 받아 상이한 분주비를 갖는 복수의 출력 신호를 생성하는 제2 주파수 분주기를 포함하는 로그 카운터가 개시된다.
Bibliography:Application Number: KR20160107811