SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided are a semiconductor device capable of suppressing electric current collapse with good reproducibility and a manufacturing method thereof. Nitride semiconductor layers (3, 4) are formed on a substrate (1). A source electrode (5), a gate electrode (7), and a drain electrode (6) are formed on...
Saved in:
Main Authors | , , , , , |
---|---|
Format | Patent |
Language | English Korean |
Published |
03.04.2017
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | Provided are a semiconductor device capable of suppressing electric current collapse with good reproducibility and a manufacturing method thereof. Nitride semiconductor layers (3, 4) are formed on a substrate (1). A source electrode (5), a gate electrode (7), and a drain electrode (6) are formed on the nitride semiconductor layers (3, 4). A SiN surface protective film (8) covers the nitride semiconductor layers (3, 4). The composition ratio of Si and N constituting a Si-N bond of the SiN surface protective film (8) is 0.751 to 0.801.
(과제) 재현성이 좋게 전류 붕괴를 억제할 수 있는 반도체 장치 및 그 제조 방법을 얻는다. (해결 수단) 기판(1)상에 질화물 반도체층(3, 4)이 형성되어 있다. 질화물 반도체층(3, 4)상에 소스 전극(5), 게이트 전극(7) 및 드레인 전극(6)이 형성되어 있다. SiN 표면 보호막(8)이 질화물 반도체층(3, 4)을 덮는다. SiN 표면 보호막(8)의 Si-N 결합을 이루는 Si와 N의 구성비 Si/N이 0.751~0.801이다. |
---|---|
AbstractList | Provided are a semiconductor device capable of suppressing electric current collapse with good reproducibility and a manufacturing method thereof. Nitride semiconductor layers (3, 4) are formed on a substrate (1). A source electrode (5), a gate electrode (7), and a drain electrode (6) are formed on the nitride semiconductor layers (3, 4). A SiN surface protective film (8) covers the nitride semiconductor layers (3, 4). The composition ratio of Si and N constituting a Si-N bond of the SiN surface protective film (8) is 0.751 to 0.801.
(과제) 재현성이 좋게 전류 붕괴를 억제할 수 있는 반도체 장치 및 그 제조 방법을 얻는다. (해결 수단) 기판(1)상에 질화물 반도체층(3, 4)이 형성되어 있다. 질화물 반도체층(3, 4)상에 소스 전극(5), 게이트 전극(7) 및 드레인 전극(6)이 형성되어 있다. SiN 표면 보호막(8)이 질화물 반도체층(3, 4)을 덮는다. SiN 표면 보호막(8)의 Si-N 결합을 이루는 Si와 N의 구성비 Si/N이 0.751~0.801이다. |
Author | IMAI AKIFUMI SUITA MUNEYOSHI NANJO TAKUMA OKAZAKI HIROYUKI YAGYU EIJI KURAHASHI KENICHIRO |
Author_xml | – fullname: IMAI AKIFUMI – fullname: KURAHASHI KENICHIRO – fullname: SUITA MUNEYOSHI – fullname: NANJO TAKUMA – fullname: YAGYU EIJI – fullname: OKAZAKI HIROYUKI |
BookMark | eNrjYmDJy89L5WSwDHb19XT293MJdQ7xD1JwcQ3zdHZVcPRzUfB1DfHwd1Hwd1PwdfQLdXN0DgkN8vRzVwjxcFUIdvR15WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8d5BRgaG5gYGxmZmRqaOxsSpAgAr6Cst |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
DocumentTitleAlternate | 반도체 장치 및 그 제조 방법 |
ExternalDocumentID | KR20170036625A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_KR20170036625A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 15:33:40 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English Korean |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_KR20170036625A3 |
Notes | Application Number: KR20160120404 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170403&DB=EPODOC&CC=KR&NR=20170036625A |
ParticipantIDs | epo_espacenet_KR20170036625A |
PublicationCentury | 2000 |
PublicationDate | 20170403 |
PublicationDateYYYYMMDD | 2017-04-03 |
PublicationDate_xml | – month: 04 year: 2017 text: 20170403 day: 03 |
PublicationDecade | 2010 |
PublicationYear | 2017 |
RelatedCompanies | MITSUBISHI ELECTRIC CORPORATION |
RelatedCompanies_xml | – name: MITSUBISHI ELECTRIC CORPORATION |
Score | 3.0427222 |
Snippet | Provided are a semiconductor device capable of suppressing electric current collapse with good reproducibility and a manufacturing method thereof. Nitride... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170403&DB=EPODOC&locale=&CC=KR&NR=20170036625A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_mFPVNp-LHlIDSt6Kj7bY-DOmSlOpoO7p07G00awqibMNV_Pe9xk33tIdAvgiXI5f7JbnLATwUiNiU6rZN1ZW2aecqN6UlXdNRMpMSNZbU4d7CqB2k9uvEmdTgY-MLo_8J_dafI6JEzVDeS71fL_8vsZi2rVw9yjesWjz7oseM9em41cE1aRms3-PDmMXUoLQ3SIwo-W3D3RrhvrcH-wikO5U88HG_8ktZbisV_wQOhjjevDyF2vuiAUd0E3utAYfh-skbs2vpW52BO6qYFkcspSJOCOPjF8qJFzESchHEjMQ-Cb0o9T0q0srKgYiAk5EX8nO497mggYk0TP-mPB0k2wRbF1CfL-bqEkjhFAgZnrJWFXSonWVuNrMdTAr7FU6eXUFz10jXu5tv4LgqassUqwn18vNL3aLSLeWd5tUPZL6AWw |
link.rule.ids | 230,309,783,888,25576,76876 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR1dS8Mw8JhTnG86FT-mBpS-FZW2-3gY0iUpnVvb0aVjb6PZUhBlG67i3_caN93THgIhF47kyH0kuQ-AhwwtNqWadVM1pW3aMzUzpSVbpqNkKiVqLKnLvQVh3U_s17EzLsHHJhZG5wn91skRkaOmyO-5ltfL_0cspn0rV4_yDYcWL55oM2N9O35u4Jm0DNZp80HEImpQ2u7FRhj_wlBao7nv7sE-GtmNgh_4qFPEpSy3lYp3DAcDxDfPT6D0vqhChW5qr1XhMFh_eWN3zX2rU2gNC6JFIUuoiGLC-KhLOXFDRgIu_IiRyCOBGyaeS0VSeDkQ4XMydAN-BvceF9Q3cQ2Tvy1PevH2gq1zKM8Xc3UBJHMyNBme0uei6FA9TVvp1HawKZyXObP0Emq7MF3tBt9BxRdBf9Lvhr1rOCpA2kvFqkE5__xSN6iAc3mr6fYDlWqDTg |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=SEMICONDUCTOR+DEVICE+AND+METHOD+OF+MANUFACTURING+THE+SAME&rft.inventor=IMAI+AKIFUMI&rft.inventor=KURAHASHI+KENICHIRO&rft.inventor=SUITA+MUNEYOSHI&rft.inventor=NANJO+TAKUMA&rft.inventor=YAGYU+EIJI&rft.inventor=OKAZAKI+HIROYUKI&rft.date=2017-04-03&rft.externalDBID=A&rft.externalDocID=KR20170036625A |