Multiple resistance random access memory device

According to the present invention, a multi-resistance random access memory device comprises: a substrate (100); an insulating layer (110) stacked on the substrate (100); a lower electrode (120) formed on the insulating layer (110); a lower resistance variable layer (130) formed on the lower electro...

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Bibliographic Details
Main Authors CHOI, SUNG YOOL, SHIN, GWANG HYUK, JANG, BYUNG CHUL
Format Patent
LanguageEnglish
Korean
Published 08.02.2017
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:According to the present invention, a multi-resistance random access memory device comprises: a substrate (100); an insulating layer (110) stacked on the substrate (100); a lower electrode (120) formed on the insulating layer (110); a lower resistance variable layer (130) formed on the lower electrode (120); an upper resistance variable layer (150) arranged above the lower resistance variable layer (130) to be separated in the vertical direction; a charge storage layer (140) arranged between the resistance variable layers (130, 150); and an upper electrode (160) arranged to be in contact with the top of the upper resistance variable layer (150). 본 발명에 따른 다중저항변화 메모리소자는 기판(100); 상기 기판(100) 상에 적층되는 절연막(110); 상기 절연막(110) 상에 형성되는 하부 전극(120); 상기 하부 전극(120) 상에 형성되는 하부 저항변화막(130); 상기 하부 저항변화막(130)의 상부 방향으로 이격된 상태로 배치되는 상부 저항변화막(150); 상기 저항변화막(130,150) 사이에 배치되는 전하저장층(140); 및 상기 상부 저항변화막(150)의 상단에 접촉 배치되는 상부 전극(160);을 포함한다.
Bibliography:Application Number: KR20150108472