MULTI-GATE DEVICE AND METHOD OF FABRICATION THEREOF

The present invention provides a method for fabricating a semiconductor device, including forming a fin extending from a substrate and having a source/drain area and a channel area. The fin includes a first epitaxial layer having a first composition and a second epitaxial layer having a second compo...

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Main Authors LIEN WAI YI, LEUNG YING KEUNG, TSAI CHING WEI, CHING KUO CHENG, WANG CHIH HAO, DIAZ CARLOS H
Format Patent
LanguageEnglish
Korean
Published 09.01.2017
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The present invention provides a method for fabricating a semiconductor device, including forming a fin extending from a substrate and having a source/drain area and a channel area. The fin includes a first epitaxial layer having a first composition and a second epitaxial layer having a second composition on the first epitaxial layer. The second epitaxial layer is removed from the source/drain area of the fin so as to form a gap. The gap is filled with dielectric material. The different epitaxial material is formed on at least two surfaces of the first epitaxial layer so as to form a source/drain feature unit. 기판으로부터 연장되며 그리고 소스/드레인 영역 및 채널 영역을 갖는 핀을 형성하는 것을 포함하는, 반도체 소자 제조 방법이 설명된다. 핀은, 제1 조성을 구비하는 제1 에피택셜 층 및 제1 에피택셜 층 상의 제2 조성을 구비하는 제2 에피택셜 층을 포함한다. 제2 에피택셜 층은 간극을 형성하기 위해 핀의 소스/드레인 영역으로부터 제거된다. 간극은 유전체 재료로 채워진다. 다른 에피택셜 재료가, 소스/드레인 특징부를 형성하기 위해 제1 에피택셜 층의 적어도 2개의 표면 상에 형성된다.
Bibliography:Application Number: KR20150163929