SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
A semiconductor device according to an embodiment of the present invention includes a substrate including a cell region and a peripheral region; a cell laminate stacked on the substrate in the cell region; an integral channel layer passing through the cell laminate; a driving transistor formed in th...
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| Main Author | |
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| Format | Patent |
| Language | English Korean |
| Published |
06.12.2016
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| Subjects | |
| Online Access | Get full text |
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| Summary: | A semiconductor device according to an embodiment of the present invention includes a substrate including a cell region and a peripheral region; a cell laminate stacked on the substrate in the cell region; an integral channel layer passing through the cell laminate; a driving transistor formed in the peripheral region; and a plug structure connected to the driving transistor and formed in a laminated structure of at least two contact plugs shorter than the channel layer. Each of the contact plugs may have a part disposed at the same height as that of a part of the cell laminate. So, the structural stability of a plug structure can be improved.
본 발명의 실시 예에 따른 반도체 장치는 셀 영역 및 주변 영역을 포함하는 기판; 상기 셀 영역에서 상기 기판 상에 적층된 셀 적층체; 상기 셀 적층체를 관통하는 일체의 채널막; 상기 주변 영역에 형성된 구동 트랜지스터; 및 상기 구동 트랜지스터에 연결되고, 상기 채널막보다 짧은 2 이상의 콘택 플러그들의 적층 구조로 형성된 플러그 구조를 포함하고, 상기 콘택 플러그들 각각은 상기 셀 적층체의 일부와 동일한 높이에 배치된 부분을 가질 수 있다. |
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| Bibliography: | Application Number: KR20150124390 |