INTEGRATED CIRCUIT FOR ESTIMATING POWER OF AT LEAST ONE NODE USING TEMPERATURE AND SYSTEM HAVING THE SAME

According to an embodiment of the present invention, a power estimation circuit comprises: a power estimation manager circuit configured to receive power data and temperature data; and a storage circuit which includes a first region storing resistive-capacitive (RC) thermal modeling data, a second r...

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Bibliographic Details
Main Authors YIM, MYUNG KYOON, LEE, KYONG SU, KIM, WOOK, SRIDHAR SUNDARAM, KIM, JI CHUL
Format Patent
LanguageEnglish
Korean
Published 07.04.2016
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:According to an embodiment of the present invention, a power estimation circuit comprises: a power estimation manager circuit configured to receive power data and temperature data; and a storage circuit which includes a first region storing resistive-capacitive (RC) thermal modeling data, a second region storing the power data, and a third region storing the temperature data. The power estimation manager circuit is configured to estimate power consumption of a first node at a second time point, which occurs after a first time point, using the RC thermal modeling data, the power data and the temperature data. 본 발명의 실시 예에 따른 전력 예측 회로는 전력 데이터와 온도 데이터를 수신하는 전력 예측 매니저 회로와, RC 열 모델링 데이터를 저장하는 제1영역, 상기 전력 데이터를 저장하는 제2영역, 및 상기 온도 데이터를 저장하는 제3영역을 포함하는 저장 회로를 포함하고, 상기 전력 예측 매니저 회로는, 상기 RC 열 모델링 데이터, 상기 온도 데이터, 및 상기 전력 데이터를 이용하여, 제1시점 후에 발생한 제2시점에서, 제1노드의 전력 소모를 예측한다.
Bibliography:Application Number: KR20150017096