SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

The performance of a semiconductor device is improved. The semiconductor device comprises an SOI substrate (SB1), and an MISFT (Q1) formed on an SOI substrate (SB1). The SOI substrate (SB1) has a base body (SS1), a ground plane region (GP) formed on the base body (SS1), a BOX layer (3) formed on the...

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Bibliographic Details
Main Author ODA HIDEKAZU
Format Patent
LanguageEnglish
Korean
Published 01.04.2016
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Summary:The performance of a semiconductor device is improved. The semiconductor device comprises an SOI substrate (SB1), and an MISFT (Q1) formed on an SOI substrate (SB1). The SOI substrate (SB1) has a base body (SS1), a ground plane region (GP) formed on the base body (SS1), a BOX layer (3) formed on the ground plane region (GP), and an SOI layer (4) formed on the BOX layer (3). The base body (SS1) is made of silicon. The ground plane region (GP) includes a semiconductor region (1) made of silicon carbide. 반도체 장치의 성능을 향상시킨다. 반도체 장치는 SOI 기판(SB1)과, SOI 기판(SB1)에 형성된 MISFET(Q1)를 구비한다. SOI 기판(SB1)은 기체(基體)(SS1), 기체(SS1) 위에 형성된 그라운드 플레인 영역(GP), 그라운드 플레인 영역(GP) 위에 형성된 BOX층(3) 및 BOX층(3) 위에 형성된 SOI층(4)을 가진다. 기체(SS1)는 실리콘으로 이루어지고, 그라운드 플레인 영역(GP)은 실리콘 카바이드로 이루어진 반도체 영역(1)을 포함한다.
Bibliography:Application Number: KR20150132921