SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

A three-dimensional semiconductor device includes a substrate which includes a cell array region, a word line contact region, and a peripheral circuit region; gate electrodes which are extended from the cell array region to the word line contact region, and are stacked on the substrate; a channel ho...

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Main Authors YOO, DONG CHUL, KIM, CHAE HO, AHN, JAE YOUNG, LEE, WOONG
Format Patent
LanguageEnglish
Korean
Published 23.02.2016
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Abstract A three-dimensional semiconductor device includes a substrate which includes a cell array region, a word line contact region, and a peripheral circuit region; gate electrodes which are extended from the cell array region to the word line contact region, and are stacked on the substrate; a channel hole which penetrates the gate electrodes of the cell array region to expose the active region of the substrate; and a dummy hole which penetrates the gate electrodes of the word line contact region to expose a device isolation layer of the substrate. A semiconductor pattern can be formed only in the channel hole except for the dummy hole. 3차원 반도체 장치는 셀 어레이 영역, 워드라인 콘택 영역 및 주변 회로 영역을 포함하는 기판, 상기 셀 어레이 영역에서 워드라인 콘택 영역으로 연장되어 상기 기판 상에 적층된 게이트 전극들, 상기 셀 어레이 영역의 게이트 전극들을 관통하여 상기 기판의 활성 영역을 노출하는 채널 홀, 상기 워드라인 콘택 영역의 게이트 전극들을 관통하여 기판의 소자 분리막을 노출하는 더미 홀을 포함하되, 상기 더미 홀을 제외한 상기 채널 홀 내에만 반도체 패턴이 형성될 수 있다.
AbstractList A three-dimensional semiconductor device includes a substrate which includes a cell array region, a word line contact region, and a peripheral circuit region; gate electrodes which are extended from the cell array region to the word line contact region, and are stacked on the substrate; a channel hole which penetrates the gate electrodes of the cell array region to expose the active region of the substrate; and a dummy hole which penetrates the gate electrodes of the word line contact region to expose a device isolation layer of the substrate. A semiconductor pattern can be formed only in the channel hole except for the dummy hole. 3차원 반도체 장치는 셀 어레이 영역, 워드라인 콘택 영역 및 주변 회로 영역을 포함하는 기판, 상기 셀 어레이 영역에서 워드라인 콘택 영역으로 연장되어 상기 기판 상에 적층된 게이트 전극들, 상기 셀 어레이 영역의 게이트 전극들을 관통하여 상기 기판의 활성 영역을 노출하는 채널 홀, 상기 워드라인 콘택 영역의 게이트 전극들을 관통하여 기판의 소자 분리막을 노출하는 더미 홀을 포함하되, 상기 더미 홀을 제외한 상기 채널 홀 내에만 반도체 패턴이 형성될 수 있다.
Author YOO, DONG CHUL
AHN, JAE YOUNG
LEE, WOONG
KIM, CHAE HO
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Snippet A three-dimensional semiconductor device includes a substrate which includes a cell array region, a word line contact region, and a peripheral circuit region;...
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SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
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