SEMICONDUCTOR DEVICE

The preset invention is to reduce the resistance of a conductor formed in a wiring layer. An insulating layer (ETS1) is formed on a substrate (SUB), and includes SiO_(1-x)N_x, wherein x > 0.5 is satisfied in an analysis result of XRD. A wiring (INC1) is formed on the insulating layer (ETS1), and...

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Main Authors USAMI TATSUYA, KODAMA SATOSHI, ITOU TAKAMASA, OGURA TAKASHI, UENO SHUUICHIROU, ITOU SATOSHI
Format Patent
LanguageEnglish
Korean
Published 17.02.2016
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The preset invention is to reduce the resistance of a conductor formed in a wiring layer. An insulating layer (ETS1) is formed on a substrate (SUB), and includes SiO_(1-x)N_x, wherein x > 0.5 is satisfied in an analysis result of XRD. A wiring (INC1) is formed on the insulating layer (ETS1), and has a first layer (ML1) and a second layer (ML2). The first layer (ML1) includes at least one of TiN, Tan, Wn, and RuN. The second layer (ML2) is formed on the first layer (ML1), and is made of a material which has a lower resistance than the first layer (ML1), for example, W. 본 발명의 과제는, 배선층에 형성되는 도체의 저항을 작게 하는 것이다. 절연막(ETS1)은 기판(SUB) 상에 형성되어 있고, SiON(단, XRD에 있어서의 분석 결과에 있어서 x＞0.5)를 포함한다. 배선(INC1)은 절연막(ETS1) 상에 형성되어 있고, 제1층(ML1) 및 제2층(ML2)을 갖고 있다. 제1층(ML1)은, TiN, TaN, WN, 또는 RuN 중 적어도 하나를 포함한다. 제2층(ML2)은 제1층(ML1) 상에 형성되어 있고, 제1층(ML1)보다도 저항이 낮은 재료, 예를 들어 W에 의해 형성되어 있다.
Bibliography:Application Number: KR20150110623