COMPOSITION FOR MANUFACTURING SIO 2 RESIST LAYERS AND METHOD OF ITS USE

• Main Authors: JAMES MARK, BROOKES PAUL CRAIG, KOEHLER INGO, STOCKUM WERNER, MEIJER ARJAN, PATTERSON KATIE
• Format: Patent
• Language: English; Korean
• Published: 15.02.2016
• Subjects: BASIC ELECTRIC ELEMENTS; CHEMICAL SURFACE TREATMENT; CHEMISTRY; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING MATERIAL WITH METALLIC MATERIAL; COATING METALLIC MATERIAL; DIFFUSION TREATMENT OF METALLIC MATERIAL; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL; METALLURGY; SEMICONDUCTOR DEVICES; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION

본 발명은 반도체 장치의 제조 방법 동안의 패턴화 또는 구조화된 SiO-층 또는 SiO-라인의 제조에 유용하며, 잉크젯 작동에서의 적용에 적합한 조성물에 관한 것이다. 본 발명은 또한 이러한 신규한 조성물을 이용하는 반도체 장치의 변형된 제조 방법에 관한 것이다. The present invention relates to compositions, which are useful for the generation of patterned or structured SiO2-layers or of SiO2-lines during the manufacturing process of semiconductor devices, and which are suitable for the application in inkjet operations. The present invention also relates to a modified process of manufacturing semiconductor devices taking advantage of these new compositions.