WAFER BONDING PROCESS AND STRUCTURE
A semiconductor device and a method for fabricating the same are disclosed. In an embodiment, one or more passivation layers are formed on an upper part of a first substrate. Recesses are formed in the passivation layers, and one or more conductive pads are formed in the recesses. One or more barrie...
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Main Authors | , , , , |
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Format | Patent |
Language | English Korean |
Published |
02.09.2015
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor device and a method for fabricating the same are disclosed. In an embodiment, one or more passivation layers are formed on an upper part of a first substrate. Recesses are formed in the passivation layers, and one or more conductive pads are formed in the recesses. One or more barrier layers are formed between the passivation layers and the conductive pads. The conductive pads of the first substrate are aligned with the conductive pads of a second substrate, and are bonded through a direct bonding method. |
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Bibliography: | Application Number: KR20140180457 |