STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE

The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having a periphery region and a memory region; a field effect transistor disposed in the periphery region and having silicide features; and a single floating gate non-volatile memory devi...

Full description

Saved in:
Bibliographic Details
Main Authors TSENG HUANG WEN, TSUI YING KIT
Format Patent
LanguageEnglish
Korean
Published 31.07.2015
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having a periphery region and a memory region; a field effect transistor disposed in the periphery region and having silicide features; and a single floating gate non-volatile memory device disposed in the memory region, free of silicide and having a first gate electrode and a second gate electrode laterally spaced from each other. 본 개시는 집적 회로를 제공한다. 집적 회로는 주변 영역 및 메모리 영역을 갖는 반도체 기판; 상기 주변 영역에 배치되고 실리사이드 피처를 갖는 전계 효과 트랜지스터; 및 상기 메모리 영역에 배치되고 실리사이드가 없으며, 서로 좌우로 이격된 제1 게이트 전극 및 제2 게이트 전극을 갖는 단일 부동 게이트 비휘발성 메모리 장치를 포함한다.
Bibliography:Application Number: KR20150100396