SEMICONDUCTOR CHIP WITH THROUGH-SILICON VIAS, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME
Provided is a semiconductor device with silicon-through vias. The device includes a substrate which includes a bottom semiconductor layer, a buried insulation layer and a top semiconductor layer, electronic elements which are formed on the top semiconductor layer, a vertical electrode structure whic...
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Main Authors | , |
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Format | Patent |
Language | English Korean |
Published |
04.06.2015
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Subjects | |
Online Access | Get full text |
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Summary: | Provided is a semiconductor device with silicon-through vias. The device includes a substrate which includes a bottom semiconductor layer, a buried insulation layer and a top semiconductor layer, electronic elements which are formed on the top semiconductor layer, a vertical electrode structure which includes vertical electrodes which pass through the substrate, and an electrode separation pattern which surrounds the vertical electrode structure on the view of a plane and is in direct contact with the buried insulation layer by passing through the top semiconductor layer on a vertical view.
실리콘-관통 비아들을 갖는 반도체 장치가 제공된다. 이 장치는 하부 반도체막, 매몰 절연막, 및 상부 반도체막을 구비하는 기판, 상부 반도체막에 형성된 전자 소자들, 기판을 관통하는 수직 전극들을 포함하는 수직 전극 구조체, 그리고, 평면적으로 볼 때 수직 전극 구조체를 둘러싸고 수직적으로 볼 때 상부 반도체막을 관통하여 매몰 절연막에 직접 접촉하는 전극 분리 패턴을 포함할 수 있다. |
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Bibliography: | Application Number: KR20130144657 |