THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THERROF

According to an embodiment of the present invention, a thin film transistor array panel includes: a substrate; a gate line and a pixel electrode formed on an upper part of the substrate; a gate insulating layer formed on the gate line and the pixel electrode; a semiconductor layer formed on the gate...

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Bibliographic Details
Main Authors KANG, HYUN HO, SEO, O SUNG, YIM, TAE KYUNG, KIM, HYUNG JUNE
Format Patent
LanguageEnglish
Korean
Published 20.03.2015
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Summary:According to an embodiment of the present invention, a thin film transistor array panel includes: a substrate; a gate line and a pixel electrode formed on an upper part of the substrate; a gate insulating layer formed on the gate line and the pixel electrode; a semiconductor layer formed on the gate insulating layer; a data line and a drain electrode formed on the semiconductor layer; a passivation layer configured to cover the data line and the drain electrode; and a common electrode formed on an upper part of the passivation layer, wherein the gate line includes a bottom layer containing titanium, a middle layer containing a transparent conductive material, and a top layer containing copper, and wherein the pixel electrode comprises a bottom layer containing titanium and a top layer containing a transparent conductive material. According to the embodiment of the present invention, the thin film transistor array panel may minimize the reflectivity of the gate line by inserting an IZO middle layer between the bottom layer containing titanium and the top layer containing copper. In the case of applying the thin film transistor array panel to a liquid crystal display device, the problem of reflectivity caused by an exposure of the gate line may be solved to use the thin film transistor array panel as an upper substrate, thereby minimizing the bezel of the liquid crystal display device.
Bibliography:Application Number: KR20130109370