SHIELDING A MEMORY DEVICE

A method of shielding a memory device (110) from high write rates comprising receiving instructions to write data at a memory container (105), the memory controller (105) composing a cache (120) comprising a number of cache lines defining stored data, with the memory controller (105), updating a cac...

Full description

Saved in:
Bibliographic Details
Main Authors WARNER CRAIG, PICKETT MATTHEW D, GOSTIN GARY
Format Patent
LanguageEnglish
Korean
Published 28.01.2015
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:A method of shielding a memory device (110) from high write rates comprising receiving instructions to write data at a memory container (105), the memory controller (105) composing a cache (120) comprising a number of cache lines defining stored data, with the memory controller (105), updating a cache line in response to a write hit in the cache (120), and with the memory controller (105), executing the instruction to write data in response to a cache miss to a cache line within the cache (120) in which the memory controller (105) prioritizes for writing to the cache (120) over writing to the memory device (110).
Bibliography:Application Number: KR20147029986