SEMICONDUCTOR PACKAGE

The present invention provides a semiconductor package. The semiconductor package includes a substrate, a bottom semiconductor chip which is arranged on the substrate, a top semiconductor chip which is arranged on the bottom semiconductor chip and exposes both ends of the bottom semiconductor chip,...

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Bibliographic Details
Main Authors IM, YUN HYEOK, JANG, EON SOO, PARK, KYOL
Format Patent
LanguageEnglish
Korean
Published 10.12.2014
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The present invention provides a semiconductor package. The semiconductor package includes a substrate, a bottom semiconductor chip which is arranged on the substrate, a top semiconductor chip which is arranged on the bottom semiconductor chip and exposes both ends of the bottom semiconductor chip, a heat slag which is arranged on the top semiconductor chip, a molding layer which is provided between the substrate and the heat slag, and a top spacer which is interposed between the bottom semiconductor chip and the heat slag and is provided on both ends of the bottom semiconductor chip.
Bibliography:Application Number: KR20130062865