POWER-ON-RESET CIRCUIT USING CLOCK SIGNAL AND PEAK DETECTOR

The present invention relates to a power-on-reset circuit using a clock signal and a peak detector and, more particularly, to a power-on-reset circuit which initializes an internal circuit which includes a storage device like a flip-flop or a latch by using the clock signal and the peak detector wit...

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Bibliographic Details
Main Authors HWANG, MYUNG WOON, MOON, JE CHEOL
Format Patent
LanguageEnglish
Korean
Published 07.11.2014
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Summary:The present invention relates to a power-on-reset circuit using a clock signal and a peak detector and, more particularly, to a power-on-reset circuit which initializes an internal circuit which includes a storage device like a flip-flop or a latch by using the clock signal and the peak detector without additionally using an external pin.
Bibliography:Application Number: KR20130048832