VOLTAGE ASSISTED STT-MRAM WRITING SCHEME

The present invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device which includes a magnetic element. The magnetic element according to the embodiment of the present invention includes a reference layer, a free layer, a barrier layer which is loca...

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Bibliographic Details
Main Authors KROUNBI MOHAMAD TOWFIK, ONG ADRIAN E, NIKITIN VLADIMIR
Format Patent
LanguageEnglish
Korean
Published 06.08.2014
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:The present invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device which includes a magnetic element. The magnetic element according to the embodiment of the present invention includes a reference layer, a free layer, a barrier layer which is located between the reference layer and the reference layer, a first electrode, an insulation layer which is located between the first electrode and the free layer, and a second electrode which is connected to the side of the free layer. According to the present invention, a small amount of currents are used and an error rate is reduced.
Bibliography:Application Number: KR20140003012