SYSTEM ON CHIP INCLUDING A PLURALITY OF HETEROGENEOUS CORES AND OPERATING METHOD THEROF

Provided are a SoC with a plurality of multi-cores and an operation method of the SoC. The SoC according to embodiments of the present invention includes a high performance cluster including a plurality of high performance multi-cores; a low power cluster including a plurality of low power cores; an...

Full description

Saved in:
Bibliographic Details
Main Authors YOUN, CHANG HWAN, YU, KI SOO, SUN, KYUNG IL
Format Patent
LanguageEnglish
Korean
Published 16.07.2014
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:Provided are a SoC with a plurality of multi-cores and an operation method of the SoC. The SoC according to embodiments of the present invention includes a high performance cluster including a plurality of high performance multi-cores; a low power cluster including a plurality of low power cores; and a switcher which compares the working capacities of a central processing unit (CPU) load and each of the high-performance cores and low power cores to switch between the high performance cluster and the low power cluster. The switcher makes the cores switch to each other by using a history log equalization method in order to easily change the number of the cores to be involved in switching during an operation and equalize the lifetimes of the cores.
Bibliography:Application Number: KR20130001760