SENSE AMPLIFIER WITH DUAL GATE PRECHARGE AND DECODE TRANSISTORS

The invention relates to a sense amplifier for sensing and amplifying data stored in a memory cell, the sense amplifier being connected between a bit line (BL) and a reference bit line complementary (/BL) to the first bit line and comprising: a sense circuit (SC) capable of providing an output indic...

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Bibliographic Details
Main Authors HOENLEIN WOLFGANG, VOLLRATH JOERG, FRANZ HOFMANN, THEWES ROLAND, FERRANT RICHARD, ENDERS GERHARD
Format Patent
LanguageEnglish
Korean
Published 26.06.2014
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:The invention relates to a sense amplifier for sensing and amplifying data stored in a memory cell, the sense amplifier being connected between a bit line (BL) and a reference bit line complementary (/BL) to the first bit line and comprising: a sense circuit (SC) capable of providing an output indicative of the data stored in the memory cell; and a precharge and decode circuit (PDC) comprising a pair of dual gate transistors (T5, T6) for precharging the first and second bit lines during a precharge operation and for transferring the output provided by the sense circuit to a data line (LIO,/LIO) during a read operation.
Bibliography:Application Number: KR20147012866