VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME

In a method for manufacturing a vertical memory device, sacrificial layers and insulating layers are formed on a substrate. The sacrificial layers and the insulating layers are partially etched to form an opening part for exposing the surface of a substrate. A charge trapping layer and a tunnel insu...

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Main Authors KIM, BI O, HWANG, KI HYUN, SUN, CHANG WOO, AHN, JAE YOUNG, NAKANISHI TOSHIRO, NOH, JIN TAE, LIM, SEUNG HYUN
Format Patent
LanguageEnglish
Korean
Published 29.01.2014
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:In a method for manufacturing a vertical memory device, sacrificial layers and insulating layers are formed on a substrate. The sacrificial layers and the insulating layers are partially etched to form an opening part for exposing the surface of a substrate. A charge trapping layer and a tunnel insulating layer are formed in the sidewall of the opening part. A channel layer including N-type-impurity-doped polysilicon is formed along the inner wall profile of the opening part on the tunnel insulating layer. A burying insulating pattern is formed at the opening part formed in the channel layer. Also, a blocking dielectric layer and a control gate are formed on the charge trapping layer of one sidewall of the channel layer.
Bibliography:Application Number: KR20120079541