SEMICONDUCTOR MEMORY DEVICE

PURPOSE: A semiconductor memory device is provided to secure an enough margin about a bit line disturbance phenomenon by reducing an operating current which flows during a reading operation. CONSTITUTION: A bit line (BL) is connected to a memory cell (MC). An input-output line (IOL) inputs a data si...

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Bibliographic Details
Main Authors YAMADA SATORU, CHAE, KYO SUK
Format Patent
LanguageEnglish
Korean
Published 31.10.2013
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:PURPOSE: A semiconductor memory device is provided to secure an enough margin about a bit line disturbance phenomenon by reducing an operating current which flows during a reading operation. CONSTITUTION: A bit line (BL) is connected to a memory cell (MC). An input-output line (IOL) inputs a data signal to the memory cell during a writing operation and is comprised to output the data signal which is stored in the memory cell during the reading operation. A column selection transistor (CSTR) includes a first source/drain which is connected to the bit line and a second source/drain which is connected to the input-output line. The first source/drain and the second source/drain have an asymmetry resistance.
Bibliography:Application Number: KR20120042177