HANDLING OF WRITE OPERATIONS WITHIN A MEMORY DEVICE
PURPOSE: Handling of recording operations within a memory device accurately tracks the timing of the recording operations within a memory by forming a recording self-timed path. CONSTITUTION: A control circuit (30) controls a signal supplied to a word line and a bit line of an array and controls a r...
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Main Author | |
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Format | Patent |
Language | English Korean |
Published |
11.10.2013
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Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE: Handling of recording operations within a memory device accurately tracks the timing of the recording operations within a memory by forming a recording self-timed path. CONSTITUTION: A control circuit (30) controls a signal supplied to a word line and a bit line of an array and controls a recording operation and a reading operation. A dummy column (35) includes multiple dummy memory cells (40) for a load and dummy memory cells (50) for record timing. A dummy record driver circuit (60) is connected to a dummy bit line. A record detection circuit (65) generates a recording termination signal to the control circuit to terminate the recording operation when a state flip condition is generated. [Reference numerals] (10) Memory array; (15) Precharging circuit; (16) Dummy WL; (20) Sense amplifier circuit; (25) Record driver circuit; (30) Control circuit; (35) Dummy column; (40) Dummy cell for load; (45) Random reading timing dummy cell; (50) Record timing dummy cell; (55) Dummy precharging circuit; (60) Dummy record driver circuit; (65) Record detection circuit; (70) Random reading detection circuit; (AA) Dummy WD |
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Bibliography: | Application Number: KR20130028412 |