METHOD OF PROGRAMMING SELECTION TRANSISTORS FOR NAND FLASH MEMORY

PURPOSE: A method of programming selection transistors for a NAND flash memory improves the performance of a NAND flash memory device by accurately controlling the threshold voltage of the selection transistors. CONSTITUTION: A non-volatile memory device including multiple cells (300), multiple sele...

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Bibliographic Details
Main Authors BARTOLI SIMONE, KHOURI OSAMA
Format Patent
LanguageEnglish
Korean
Published 10.10.2013
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PURPOSE: A method of programming selection transistors for a NAND flash memory improves the performance of a NAND flash memory device by accurately controlling the threshold voltage of the selection transistors. CONSTITUTION: A non-volatile memory device including multiple cells (300), multiple selection transistors (SST and DST), and a selection line (SL) is provided. Each selection transistor has a gate and is coupled to the associated cell among cells. The selection line is coupled in common to the gates of the selection transistors. A first program voltage is applied to the selection line. A second program voltage is applied to the selection line when at least one of the selection transistors has not been shifted to a program condition. [Reference numerals] (AA) Bit line direction
Bibliography:Application Number: KR20130033781