PROVIDING STATE STORAGE IN A PROCESSOR FOR SYSTEM MANAGEMENT MODE

In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In th...

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Main Authors GANESAN BASKARAN, SWANSON ROBERT C, RANGARAJAN THANUNATHAN, KUMAR MOHAN J, DOSHI GAUTAM B, MURTHY RAJESH NAGARAJA, BINNS FRANK, NATU MAHESH S, PARTHASARATHY RAJESH S, DATTA SHAMMANNA M
Format Patent
LanguageEnglish
Korean
Published 16.07.2013
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Abstract In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
AbstractList In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
Author KUMAR MOHAN J
BINNS FRANK
NATU MAHESH S
DATTA SHAMMANNA M
MURTHY RAJESH NAGARAJA
SWANSON ROBERT C
RANGARAJAN THANUNATHAN
DOSHI GAUTAM B
PARTHASARATHY RAJESH S
GANESAN BASKARAN
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– fullname: MURTHY RAJESH NAGARAJA
– fullname: BINNS FRANK
– fullname: NATU MAHESH S
– fullname: PARTHASARATHY RAJESH S
– fullname: DATTA SHAMMANNA M
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Snippet In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state...
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SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title PROVIDING STATE STORAGE IN A PROCESSOR FOR SYSTEM MANAGEMENT MODE
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