PROVIDING STATE STORAGE IN A PROCESSOR FOR SYSTEM MANAGEMENT MODE

In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In th...

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Bibliographic Details
Main Authors GANESAN BASKARAN, SWANSON ROBERT C, RANGARAJAN THANUNATHAN, KUMAR MOHAN J, DOSHI GAUTAM B, MURTHY RAJESH NAGARAJA, BINNS FRANK, NATU MAHESH S, PARTHASARATHY RAJESH S, DATTA SHAMMANNA M
Format Patent
LanguageEnglish
Korean
Published 16.07.2013
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
Bibliography:Application Number: KR20137013566