FPGA APPARATUS AND METHOD FOR PROTECTING BITSTREAM

PURPOSE: An FPGA(Field Programmable Gate Array) device for bit stream protection and a method thereof are provided to guarantee the integrity and airtightness of an FPGA bit stream by using a random value as key information and an initial value and preventing the exposure of the value to the outside...

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Main Authors KIM, HYO WON, PARK, JUNG HYUNG, LIM, JEONG SEOK, HAN, JAE WOO, KOO, BON SEOK, YOON, E JOONG, KIM, SOO HYEON, YANG, KWANG MO, KIM, CHOON SOO
Format Patent
LanguageEnglish
Korean
Published 25.06.2013
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Summary:PURPOSE: An FPGA(Field Programmable Gate Array) device for bit stream protection and a method thereof are provided to guarantee the integrity and airtightness of an FPGA bit stream by using a random value as key information and an initial value and preventing the exposure of the value to the outside. CONSTITUTION: A random number generator(110) is placed inside to generate an initial value and an encoding and decoding value for a bit stream. A key storage unit(120) can be accessed only in the inside and stores the initial value and the encoding and decoding value. A setting bit stream storage unit(140) is an internal nonvolatile memory to store the bit stream. An authentication, encoding, and decoding setting unit(130) calls the initial value and the encoding and decoding value to store the bit stream and an authentication code in an external nonvolatile memory(200). The authentication, encoding, and decoding setting unit verifies the integrity of the bit stream by using the bit stream. [Reference numerals] (110) Random number generator; (120) Key storage unit; (130) Authentication, encoding and decoding setting unit; (140) Setting bit stream storage unit; (150) Logic storage unit; (200) External nonvolatile memory
Bibliography:Application Number: KR20110134839