INTERLAYER INSULATING LAYER FORMATION METHOD AND SEMICONDUCTOR DEVICE
The interlayer insulating layer forming method for forming an interlayer insulating layer of a semiconductor device via a plasma CVD method includes: carrying a substrate into a depressurized processing container; supplying a plasma generating gas to a first space spaced apart from the substrate; ex...
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Format | Patent |
Language | English Korean |
Published |
24.04.2013
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Abstract | The interlayer insulating layer forming method for forming an interlayer insulating layer of a semiconductor device via a plasma CVD method includes: carrying a substrate into a depressurized processing container; supplying a plasma generating gas to a first space spaced apart from the substrate; exciting the plasma generating gas in the first space; and supplying a raw material gas including a boron compound that includes at least a hydrogen group or hydrocarbon group, to a second space between the first space and the substrate. Also, a semiconductor device is interconnected in a multilayer through an interlayer insulating layer having an amorphous structure including boron, carbon, and nitrogen, wherein, in the interlayer insulating layer, a hydrocarbon group or an alkyl amino group is mixed in the amorphous structure comprising hexagonal boron nitride and cubic boron nitride. |
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AbstractList | The interlayer insulating layer forming method for forming an interlayer insulating layer of a semiconductor device via a plasma CVD method includes: carrying a substrate into a depressurized processing container; supplying a plasma generating gas to a first space spaced apart from the substrate; exciting the plasma generating gas in the first space; and supplying a raw material gas including a boron compound that includes at least a hydrogen group or hydrocarbon group, to a second space between the first space and the substrate. Also, a semiconductor device is interconnected in a multilayer through an interlayer insulating layer having an amorphous structure including boron, carbon, and nitrogen, wherein, in the interlayer insulating layer, a hydrocarbon group or an alkyl amino group is mixed in the amorphous structure comprising hexagonal boron nitride and cubic boron nitride. |
Author | KOBAYASHI YASUO NEMOTO TAKENAO KUROTORI TAKUYA NOZAWA TOSHIHISA MIYATANI KOTARO |
Author_xml | – fullname: NEMOTO TAKENAO – fullname: MIYATANI KOTARO – fullname: KUROTORI TAKUYA – fullname: NOZAWA TOSHIHISA – fullname: KOBAYASHI YASUO |
BookMark | eNrjYmDJy89L5WRw9fQLcQ3ycYx0DVLw9AsO9XEM8fRzV4AIuPkH-QL5_n4Kvq4hHv4uCo5-LgrBrr6ezv5-LqHOIf5BCi6uYZ7OrjwMrGmJOcWpvFCam0HZzTXE2UM3tSA_PrW4IDE5NS-1JN47yMjA0NjAwMTQ0MjA0Zg4VQB_ki7O |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
ExternalDocumentID | KR20130041120A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_KR20130041120A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 15:30:33 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English Korean |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_KR20130041120A3 |
Notes | Application Number: KR20137001515 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130424&DB=EPODOC&CC=KR&NR=20130041120A |
ParticipantIDs | epo_espacenet_KR20130041120A |
PublicationCentury | 2000 |
PublicationDate | 20130424 |
PublicationDateYYYYMMDD | 2013-04-24 |
PublicationDate_xml | – month: 04 year: 2013 text: 20130424 day: 24 |
PublicationDecade | 2010 |
PublicationYear | 2013 |
RelatedCompanies | TOKYO ELECTRON LIMITED |
RelatedCompanies_xml | – name: TOKYO ELECTRON LIMITED |
Score | 2.8512583 |
Snippet | The interlayer insulating layer forming method for forming an interlayer insulating layer of a semiconductor device via a plasma CVD method includes: carrying... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION |
Title | INTERLAYER INSULATING LAYER FORMATION METHOD AND SEMICONDUCTOR DEVICE |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130424&DB=EPODOC&locale=&CC=KR&NR=20130041120A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR1dT8Iw8IJo1DdFDSqaJpq9LY6tbPOBmNEWQdhG5iD4RChjidEAkRn_vrcCyhN9au6Sy_WS6320dwdwb1sS7fYk1Q0rlTrFpct0XNVdM585aqTO1M0Lhf3AbvXpy7A2LMDnphZG9Qn9Uc0RUaMmqO-Zuq8X_0ksrv5WLh_kO4LmT824zrV1dFzNg3Oq8UZd9EIeMo2xeifSgmiFMyh6F4a3B_voSDu5PohBI69LWWwbleYJHPSQ3iw7hcLHvARHbDN7rQSH_vrJG7dr7VuegVD9a7vem4gIBt39rhe3g2eyAmA056t8E_FF3Ao58QJOXnMphwHvsziMCBeDNhPncNcUMWvpyM_o7_ijTrTNvHUBxdl8Ni0DqU5k4iRWUjMd9GoSy3XTR2lTdFlobWzb6SVUdlG62o2-hmNTjX6gukkrUMy-vqc3aIAzeavk9gu2EIID |
link.rule.ids | 230,309,783,888,25576,76876 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR1dT8JArEE04puixg_USzR7Wxzbsc0HYsbd4ZB9kDmIPhHGWGI0QGTGv293gPLEPV3apOk16fXjri3AnWkkaLfHmaoZWaJSXGqSjeqqrRczR7XMmthFobAfmG6fPr82Xkvwua6FkX1Cf2RzRNSoMep7Lu_r-X8Si8u_lYv75B1Bs8d23OTKKjquF8E5VXirKXohD5nCWLMbKUG0xGkUvQvN2YFddLKtQh_EoFXUpcw3jUr7EPZ6SG-aH0HpY1aFClvPXqvCvr968sbtSvsWxyBk_1rPeRMRwaC77zlxJ3giSwBGc77MNxFfxG7IiRNw8lJIOQx4n8VhRLgYdJg4gdu2iJmrIj_Dv-MPu9Em88YplKez6eQMSH2cpFZqpA3dQq8mNWw7e0hMii4LbYxMMzuH2jZKF9vRN1BxY98bep2gewkHuhwDQVWd1qCcf31PrtAY58m1lOEv-xSE9g |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=INTERLAYER+INSULATING+LAYER+FORMATION+METHOD+AND+SEMICONDUCTOR+DEVICE&rft.inventor=NEMOTO+TAKENAO&rft.inventor=MIYATANI+KOTARO&rft.inventor=KUROTORI+TAKUYA&rft.inventor=NOZAWA+TOSHIHISA&rft.inventor=KOBAYASHI+YASUO&rft.date=2013-04-24&rft.externalDBID=A&rft.externalDocID=KR20130041120A |