INTERLAYER INSULATING LAYER FORMATION METHOD AND SEMICONDUCTOR DEVICE
The interlayer insulating layer forming method for forming an interlayer insulating layer of a semiconductor device via a plasma CVD method includes: carrying a substrate into a depressurized processing container; supplying a plasma generating gas to a first space spaced apart from the substrate; ex...
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Main Authors | , , , , |
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Format | Patent |
Language | English Korean |
Published |
24.04.2013
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Subjects | |
Online Access | Get full text |
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Summary: | The interlayer insulating layer forming method for forming an interlayer insulating layer of a semiconductor device via a plasma CVD method includes: carrying a substrate into a depressurized processing container; supplying a plasma generating gas to a first space spaced apart from the substrate; exciting the plasma generating gas in the first space; and supplying a raw material gas including a boron compound that includes at least a hydrogen group or hydrocarbon group, to a second space between the first space and the substrate. Also, a semiconductor device is interconnected in a multilayer through an interlayer insulating layer having an amorphous structure including boron, carbon, and nitrogen, wherein, in the interlayer insulating layer, a hydrocarbon group or an alkyl amino group is mixed in the amorphous structure comprising hexagonal boron nitride and cubic boron nitride. |
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Bibliography: | Application Number: KR20137001515 |